The present invention relates generally to a photodetector apparatus and, more particularly, to an embedded silicon photodetector structure integratable in a three-dimensional (3D), complementary metal oxide semiconductor (CMOS) process flow.
Highly parallel optical data transceivers are increasingly being used to add more and more bandwidth available for high-end server systems and other similar systems. An enabling technology for such high-density communications is optical waveguide technology, in which a polymer waveguide carries optical signals between modules on a printed circuit board. A bottleneck in this scheme forms as a result of the conversion between the optical signal back to the electrical signal used by the microprocessor.
Typically, a photodetector is a diode, which can be a PN diode, a PIN diode or a Schottky diode consisted of metal on n-type or p-type semiconductor. Most commonly, a photodetector is fabricated using a III-V semiconductor such as GaAs, which needs to be packaged and connected to a silicon chip. As such, a silicon CMOS-based optical receiver has the potential to reduce packaging area, parasitics, power, and cost.
The absorption length of 850 nm light in silicon is 15-20 μm, which is much longer than the 1-2 μm absorption lengths of typical III-V semiconductors at this wavelength. Since CMOS processing is optimized to create thin-film features, high-speed silicon photodetectors are often designed with a lateral, interdigitated structure in which the contacts are fabricated on the silicon surface. Electron-hole pairs photogenerated near the surface of the wafer are quickly collected, but there are significant numbers of carriers generated deep below the surface. These deep carriers encounter a weak electric field and exhibit a long transit time to reach the surface contacts of the device, resulting in a low bandwidth (<<1 GHz).
While photodetectors that attempt to block these deep carriers by modifying the standard CMOS process in some fashion exist, they are expensive and difficult to manufacture. On the other hand, high-speed (>1 Gb/s) silicon photodetectors fabricated without any changes to the existing CMOS flow exhibit very low efficiency.